EP1K10TC100-3N vs EP1K10TC144-2 Comparaison
Comparaison détaillée côte à côte de EP1K10TC100-3N par Intel et EP1K10TC144-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1K10TC100-3N - 10K-Gate ACEX-1K FPGA, 576 Cells, 66 I/O, 100-TQFP | Intel / Altera
EP1K10TC100-3N Obsolete
Comparaison des spécifications
| Paramètre | EP1K10TC100-3N | EP1K10TC144-2 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $19,95 | $11,90 |
| Series | ACEX-1K | — |
| Family | ACEX 1K | — |
| Manufacturer | Intel (formerly Altera) | — |
| Typical Gate Count | 10,000 gates | — |
| Logic Elements (Cells) | 576 | — |
| Embedded Memory (EAB) | 12,288 bits | — |
| Number of LABs | 72 | — |
| User I/O Count | 66 | — |
| Operating Voltage (Core) | 2.5 V | — |
| Process Technology | 0.22 µm CMOS | — |
| Maximum Internal Clock Frequency | 200 MHz | — |
| Speed Grade | -3 (commercial) | — |
| Boîtier | 100-pin TQFP | 144-LQFP (TQFP-144, 1.0 mm pitch) |
| JTAG Support | Yes (IEEE 1149.1-1990) | — |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 (5.0 V) | — |
| Configuration | JTAG / serial configuration device | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs_compliance_flag] |
| Device Family | — | ACEX-1K |
| Logic Elements | — | 576 |
| Typical Gates | — | 10,000 |
| Embedded RAM Bits | — | 12,288 |
| Embedded Array Blocks (EABs) | — | 3 |
| Maximum User I/O | — | 92 |
| Core Voltage | — | 2.5 V |
| Supply Voltage Range | — | 2.375 V to 2.625 V |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| Type de montage | — | Surface Mount |
| Configuration Method | — | SRAM-based, JTAG/PS modes |
| Programming Interface | — | JTAG (IEEE 1149.1) + serial/parallel modes |
| Lead-Free | — | [DATA_NEEDED: lead_free_status] |