EP1K30QC208-1 vs EP1K30QC208-3N Comparaison
Comparaison détaillée côte à côte de EP1K30QC208-1 par Intel et EP1K30QC208-3N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1K30QC208-1 | EP1K30QC208-3N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,85 | $15,90 |
| Device Family | ACEX-1K | — |
| Logic Elements (LEs) | 1,728 | — |
| Equivalent Gates | 30,000 | — |
| Logic Array Blocks (LABs) | 216 | 172 |
| Embedded Memory (EAB) | 24,576 bits | — |
| Maximum User I/O | 147 | 147 |
| Core Supply Voltage (VCCINT) | 2.5 V (2.375 V to 2.625 V) | — |
| Boîtier | 208-BFQFP (Plastic Quad Flat Pack, PQFP208) | 208-BQFP / 208-PQFP |
| Terminal Pitch | 0.500 mm | — |
| Type de montage | Surface Mount (gull-wing leads) | Surface Mount |
| Température de fonctionnement | 0 °C to +70 °C (commercial) | Industrial (N suffix) |
| Maximum Operating Frequency | up to 250 MHz (family typical) | — |
| Process Technology | 2.5 V CMOS | 0.18 µm CMOS, SRAM-based LUT |
| Configuration Method | SRAM, in-system reconfigurable (volatile) | — |
| Boundary-Scan Test | JTAG IEEE 1149.1 | — |
| I/O Voltage Support | 2.5 V / 3.3 V (multi-volt I/O) | — |
| Configuration Device Support | EPC2, EPC4, EPC8 Enhanced Configuration Devices | — |
| Statut RoHS | Compliant (lead-free) | Compliant (lead-free / Pb-free) |
| Family | — | ACEX-1K |
| Logic Elements | — | 1,728 |
| Typical Gates | — | 30,000 |
| Embedded Array Blocks (EABs) | — | 6 (24 Kbits total) |
| Speed Grade | — | -3 (fastest) |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V (5 V tolerant I/O supported) |
| Configuration Interface | — | Serial / Parallel / JTAG (IEEE 1149.1) |