EP1S10F484C7N vs EP1S10F484C5N Comparaison
Comparaison détaillée côte à côte de EP1S10F484C7N par Intel et EP1S10F484C5N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S10F484C7N | EP1S10F484C5N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $162,00 | $52,00 |
| Family | Stratix (EP1S) | Stratix (original) |
| Manufacturer | Intel (formerly Altera) | — |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Core Voltage | 1.5 V | — |
| Logic Elements | 10,570 | — |
| Logic Array Blocks (LABs) | 1,057 | 1,057 |
| Embedded Memory (Total) | 920,448 bits | — |
| Embedded Memory Blocks | TriMatrix (M512/M4K/M-RAM) | — |
| Embedded DSP Blocks | 48 | 6 (≈48 9-bit multipliers) |
| Maximum User I/O | 335 | 335 |
| PLLs | 12 | 4 |
| Boîtier | 484-ball FineLine BGA (FBGA-484), 23 x 23 mm, 1 mm pitch | 484-ball FCBGA (F484), 23 x 23 mm, 1.0 mm pitch |
| Speed Grade | C7 (-7) | — |
| Operating Temperature (Commercial) | 0 C to +85 C | — |
| Configuration Methods | JTAG, Passive Serial, Passive Parallel | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 10,570 |
| Embedded Memory Bits | — | 920,448 |
| TriMatrix Memory Blocks | — | 14 |
| Global Clock Networks | — | 12 |
| User I/O Standard Support | — | LVDS, LVPECL, PCI-X, RapidIO, DDR |
| Core Voltage (VCCINT) | — | 1.5 V |
| Maximum Internal Frequency | — | 500 MHz (per Stratix datasheet) |
| Operating Temperature (TJ) | — | 0 °C to 85 °C (Commercial) |
| Type de montage | — | Surface Mount |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |
| Device Status | — | Obsolete - last time buy completed |
| Design Toolchain | — | Quartus II (≤ v13.0) |