EP1S10F672I7N vs EP1S10F672C7N Comparaison
Comparaison détaillée côte à côte de EP1S10F672I7N par Intel et EP1S10F672C7N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S10F672I7N | EP1S10F672C7N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $118,00 | $171,00 |
| Family | Stratix | — |
| Logic Elements | 10,570 | — |
| Logic Array Blocks (LABs) | 1,057 | — |
| User I/Os | 345 | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | — |
| Maximum Internal Frequency | 420.17 MHz | — |
| Température de fonctionnement | 0C to 85C | 0C to +85C (Commercial) |
| Boîtier | 672-ball FineLine BGA, 35 x 35 mm, 1.27 mm pitch | — |
| Logic Family | CMOS | — |
| Embedded Memory | 920 Kbits (TriMatrix) | — |
| DSP Blocks | Yes (dedicated) | 6 |
| Configuration Interface | Active Serial / Passive Serial / JTAG | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Speed Grade | I7 (industrial, -7 speed bin) | — |
| Niveau MSL | 3 (per JEDEC J-STD-020, typical for BGA of this era) | [DATA_NEEDED: MSL moisture sensitivity level] |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | [DATA_NEEDED: per Intel PDN] | [DATA_NEEDED: RoHS compliance] |
| Series | — | Stratix |
| Logic Elements / Cells | — | 10,570 |
| Number of LABs/CLBs | — | 1,057 |
| Total RAM Bits | — | 920,448 |
| Number of User I/Os | — | 345 |
| Number of Gates | — | [DATA_NEEDED: total gate count] |
| Package Type | — | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch |
| Core Voltage | — | 1.5 V |
| Maximum Operating Frequency | — | 420.17 MHz |
| Configuration Method | — | SRAM, JTAG, passive/active serial/parallel |