EP1S10F780C7N vs EP1S10F780C6N Comparaison
Comparaison détaillée côte à côte de EP1S10F780C7N par Intel et EP1S10F780C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S10F780C7N | EP1S10F780C6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $96,20 | $205,00 |
| Family | Stratix | Stratix |
| Logic Elements (LEs) | 10,570 | 10,570 |
| Embedded Memory | 920 Kbits (TriMatrix: MLAB, M512, M4K) | 920 Kbit (TriMatrix) |
| Embedded Multipliers | Yes (DSP blocks) | — |
| PLLs / DLLs | 6 PLL + DLL blocks | — |
| User I/O Count | Up to 426 | 426 (per FindIC) |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Boîtier | FBGA-780 (29 × 29 mm, 1.0 mm pitch) | FBGA-780 (29 x 29 mm, 1.0 mm pitch) |
| Température de fonctionnement | 0°C to 85°C (Commercial) | 0 C to +85 C (Commercial) |
| Speed Grade | C7 | — |
| Process Technology | 0.13 μm CMOS, 1.5 V core | 130 nm CMOS |
| I/O Standards Supported | LVDS, LVPECL, SSTL, HSTL, LVCMOS, LVTTL | — |
| Configuration Modes | AS, PS, JTAG | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | [DATA_NEEDED: rohs status not confirmed in verified data] | Non-compliant (LEAD FR finish per AiPCBA datasheet) |
| Configurable Logic Blocks (CLBs) | — | 1,200 |
| I/O Supply Voltage | — | Multi-voltage (3.3 V / 2.5 V / 1.8 V LVTTL/LVCMOS, LVDS) |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| Pin / Ball Count | — | 780 |
| Logic Family | — | CMOS |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous |
| Lead Finish | — | SnPb (LEAD FR / non-RoHS variant) |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |