EP1S10F780C7N vs EP1S10F780I6N Comparaison
Comparaison détaillée côte à côte de EP1S10F780C7N par Intel et EP1S10F780I6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S10F780C7N | EP1S10F780I6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $96,20 | $98,75 |
| Family | Stratix | Stratix |
| Logic Elements (LEs) | 10,570 | — |
| Embedded Memory | 920 Kbits (TriMatrix: MLAB, M512, M4K) | — |
| Embedded Multipliers | Yes (DSP blocks) | — |
| PLLs / DLLs | 6 PLL + DLL blocks | — |
| User I/O Count | Up to 426 | — |
| Core Supply Voltage | 1.5 V | — |
| Boîtier | FBGA-780 (29 × 29 mm, 1.0 mm pitch) | 780-ball FineLine BGA, 29 x 29 mm, 1.0 mm pitch |
| Température de fonctionnement | 0°C to 85°C (Commercial) | -40 °C to +100 °C (industrial) |
| Speed Grade | C7 | -6 (6.0 ns core clock period) |
| Process Technology | 0.13 μm CMOS, 1.5 V core | 0.13 µm CMOS |
| I/O Standards Supported | LVDS, LVPECL, SSTL, HSTL, LVCMOS, LVTTL | — |
| Configuration Modes | AS, PS, JTAG | Active Serial (AS), Passive Serial (PS), JTAG |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | [DATA_NEEDED: rohs status not confirmed in verified data] | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements | — | 10,570 |
| Logic Array Blocks (LABs) | — | 1,057 |
| User I/Os | — | 426 |
| Embedded RAM (Total) | — | 920,448 bits |
| M512 Blocks | — | 94 (32 x 18 bits each) |
| M4K Blocks | — | 60 (128 x 36 bits each) |
| M-RAM Blocks | — | 1 (4 Kbit) |
| PLLs | — | 6 |
| Clock Outputs | — | 16 |
| DSP Blocks | — | 12 |
| Transceiver Channels | — | 12 (not populated on I6 speed grade) |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage (VCCIO) | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (per bank) |
| Niveau MSL | — | 3 (168 hours) |
| Logic Family | — | CMOS |
| Supply Voltage Nominal | — | 1.5 V |