EP1S20F672C7N vs EP1S20F672C7 Comparaison
Comparaison détaillée côte à côte de EP1S20F672C7N par Intel et EP1S20F672C7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S20F672C7N | EP1S20F672C7 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $109,20 | $195,00 |
| Series | Stratix (first generation) | Stratix |
| Family | Stratix | Altera Stratix FPGA |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Logic Cells | 18,460 | — |
| Configurable Logic Blocks (CLBs) | 2,132 | — |
| Embedded Memory (TriMatrix) | 1,669,248 bits (426 Kbit total) | — |
| DSP Blocks | 56 (dedicated 18x18 multipliers) | [DATA_NEEDED: DSP block count] |
| Maximum User I/O | 586 | — |
| I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| PLLs | Up to 12 | — |
| Maximum Operating Frequency | 420.17 MHz | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm CMOS | — |
| Boîtier | 672-FBGA (FineLine BGA) | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) |
| Package Body Size | 35 mm x 35 mm | — |
| Ball Pitch | 1.27 mm | — |
| Température de fonctionnement | 0°C to +85°C (commercial) | 0C to 85C (commercial) |
| Speed Grade | C7 (-7) | C7 |
| Type de montage | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Yes (lead-free finish, RoHS compliant) | — |
| Configuration Modes | PS, PPS, FPP, JTAG | JTAG, Passive Serial, Fast Passive Parallel, Active Serial |
| Niveau MSL | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: MSL level] |
| Embedded Memory Bits | — | 1,669,248 |
| User I/O Pins | — | 426 |
| Logic Family | — | CMOS, SRAM-based |
| Core Supply Voltage | — | 1.5 V |
| Statut RoHS | — | unknown |
| Clock PLLs | — | Up to 10 |