EP1S25F672C5N vs EP1S25F672C6 Comparaison
Comparaison détaillée côte à côte de EP1S25F672C5N par Intel et EP1S25F672C6 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S25F672C5N | EP1S25F672C6 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $142,00 | $125,00 |
| Family | Stratix | Stratix |
| Series | EP1S25 | — |
| Logic Elements (Cells) | 25,660 | — |
| Number of CLBs | 2,566 | — |
| Number of Logic Cells / Gates | [DATA_NEEDED: total system gates] | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Maximum Internal Frequency | 500 MHz | — |
| Core Supply Voltage | 1.5 V (nominal) | — |
| Number of I/O Pins | 473 user I/O | — |
| Number of I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Package Type | FineLine BGA (FBGA) | — |
| Package Pin Count | 672 | — |
| Ball Pitch | 1.00 mm | — |
| Plage de température de fonctionnement | 0 °C to +85 °C (commercial) | — |
| Speed Grade | C5 | 6 |
| Lead-Free (Pb-Free) | Yes (suffix "N") | — |
| Configuration Method | SRAM-based, programmable via JTAG / Passive Serial / Fast Passive Parallel | JTAG, Passive Serial, Fast Passive Parallel, Active Serial |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | Compliant | Compliant |
| Logic Elements | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,852 |
| Total RAM Bits | — | 1,944,576 |
| DSP Blocks | — | 14 |
| Maximum User I/O | — | 473 |
| Boîtier | — | 672-BBGA (FineLine BGA, 35 x 35 mm, 1.27 mm pitch) |
| Core Voltage | — | 1.5 V |
| Température de fonctionnement | — | 0C to +85C (Commercial) |
| Logic Family | — | CMOS |
| PLL Count (Maximum) | — | 12 (including enhanced PLLs) |