EP1S25F672I7N vs EP1S25F672C5N Comparaison
Comparaison détaillée côte à côte de EP1S25F672I7N par Intel et EP1S25F672C5N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S25F672I7N | EP1S25F672C5N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $125,40 | $142,00 |
| Family | Stratix | Stratix |
| Logic Elements | 25,660 | — |
| Embedded Memory | 1.9 Mbit TriMatrix | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V (nominal) |
| Boîtier | 672-ball FineLine BGA, 35 x 35 mm, 1.27 mm pitch | — |
| User I/O Pins | 473 | — |
| Maximum Operating Frequency | 420 MHz (internal) | — |
| Température de fonctionnement | 0 °C to 85 °C (Industrial) | — |
| Speed Grade | -7 | C5 |
| Type de montage | Surface Mount (SMT) | Surface Mount (BGA) |
| Configuration Mode | Passive Serial / Fast Passive Parallel / JTAG | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Compliant |
| DSP Blocks | Dedicated 18 x 18 multipliers | — |
| Series | — | EP1S25 |
| Logic Elements (Cells) | — | 25,660 |
| Number of CLBs | — | 2,566 |
| Number of Logic Cells / Gates | — | [DATA_NEEDED: total system gates] |
| Maximum Internal Frequency | — | 500 MHz |
| Number of I/O Pins | — | 473 user I/O |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Package Type | — | FineLine BGA (FBGA) |
| Package Pin Count | — | 672 |
| Ball Pitch | — | 1.00 mm |
| Plage de température de fonctionnement | — | 0 °C to +85 °C (commercial) |
| Lead-Free (Pb-Free) | — | Yes (suffix "N") |
| Configuration Method | — | SRAM-based, programmable via JTAG / Passive Serial / Fast Passive Parallel |