EP1S25F672I7N vs EP1S25F672C5N 对比

详细并排对比 EP1S25F672I7N 出自 Intel 和 EP1S25F672C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S25F672I7N EP1S25F672C5N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $125.40 $142.00
Family Stratix Stratix
Logic Elements 25,660 —
Embedded Memory 1.9 Mbit TriMatrix —
Process Technology 130 nm CMOS 130 nm CMOS
Core Supply Voltage 1.5 V 1.5 V (nominal)
封装 672-ball FineLine BGA, 35 x 35 mm, 1.27 mm pitch —
User I/O Pins 473 —
Maximum Operating Frequency 420 MHz (internal) —
工作温度 0 °C to 85 °C (Industrial) —
Speed Grade -7 C5
安装类型 Surface Mount (SMT) Surface Mount (BGA)
Configuration Mode Passive Serial / Fast Passive Parallel / JTAG —
MSL 等级 [DATA_NEEDED: MSL rating] —
RoHS 状态 [DATA_NEEDED: RoHS compliance] Compliant
DSP Blocks Dedicated 18 x 18 multipliers —
Series — EP1S25
Logic Elements (Cells) — 25,660
Number of CLBs — 2,566
Number of Logic Cells / Gates — [DATA_NEEDED: total system gates]
Maximum Internal Frequency — 500 MHz
Number of I/O Pins — 473 user I/O
Number of I/O Banks — [DATA_NEEDED: I/O bank count]
Package Type — FineLine BGA (FBGA)
Package Pin Count — 672
Ball Pitch — 1.00 mm
工作温度范围 — 0 °C to +85 °C (commercial)
Lead-Free (Pb-Free) — Yes (suffix "N")
Configuration Method — SRAM-based, programmable via JTAG / Passive Serial / Fast Passive Parallel

数据手册与资源

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