EP1S30F780C8 vs EP1S30F780C6GA Comparaison
Comparaison détaillée côte à côte de EP1S30F780C8 par Intel et EP1S30F780C6GA par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP1S30F780C8 - 32,470 LEs Stratix FPGA, 597 I/O, 780-FBGA | Intel
EP1S30F780C8 ⚠ Dernier achat
Comparaison des spécifications
| Paramètre | EP1S30F780C8 | EP1S30F780C6GA |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $175,00 | $1 100,00 |
| Family | Stratix (EP1S) | Stratix FPGA |
| Logic Elements | 32,470 | 32,470 |
| Logic Family | CMOS | — |
| Process Technology | 130 nm | 0.13 um |
| Core Supply Voltage | 1.5 V | — |
| Maximum User I/O | 597 | — |
| Maximum Operating Frequency | 357.14 MHz | — |
| Boîtier | 780-ball FC-FBGA (F780) | — |
| Package Size | 29 mm × 29 mm | — |
| Ball Pitch | 1.0 mm | — |
| Température de fonctionnement | 0 °C to 85 °C (Commercial) | [DATA_NEEDED: industrial/commercial range] |
| Style de montage | Surface Mount (SMD) | — |
| Configuration Modes | PS, PPS, PPA, FPP, JTAG | — |
| Memory Interface Support | DDR, DDR2, QDR, ZBT SRAM | — |
| I/O Standards | LVDS, LVPECL, PCI, PCI-X, HSTL, SSTL | — |
| Statut RoHS | Non-compliant (legacy SnPb ball finish) | [DATA_NEEDED] |
| Speed Grade | C8 (Commercial, grade 8) | — |
| Series | — | Stratix |
| Total RAM Bits | — | 3,317,184 |
| Number of I/O | — | 597 (maximum user I/O) |
| Core Voltage | — | 1.425 V to 1.575 V |
| Boîtier / Format | — | 780-BBGA, FCBGA |
| Supplier Device Package | — | 780-FBGA (29 x 29 mm) |
| Type de montage | — | Surface Mount |
| DSP Blocks | — | Integrated dedicated multipliers |
| PLL Count | — | Multiple (per Stratix family) |
| Configuration Memory | — | SRAM-based, volatile |
| Lead-Free Status | — | [DATA_NEEDED] |
| Niveau MSL | — | [DATA_NEEDED] |
| Architecture | — | Altera Stratix (programmable logic + TriMatrix memory + DSP blocks) |