EP1S60F1020C7 vs EP1S60F1020C6N Comparaison
Comparaison détaillée côte à côte de EP1S60F1020C7 par Altera et EP1S60F1020C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S60F1020C7 | EP1S60F1020C6N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 750,00 | $195,00 |
| Series | Stratix | Stratix |
| Family | Stratix (EP1S60) | Stratix (EP1S) |
| Logic Elements | 57,120 | — |
| Total Memory Bits | 5,215,104 | — |
| Maximum User I/O | 773 | — |
| Boîtier | 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Logic Family | CMOS | — |
| Température de fonctionnement | 0C to +85C (Commercial) | 0°C to +85°C (Commercial) |
| Core Supply Voltage | 1.5 V | — |
| Speed Grade | 7 | C6 (mid-tier) |
| Logic Cells / Logic Blocks | 6,570 (per datasheet Section I nomenclature) | — |
| DSP Blocks | Embedded dedicated multiplier / adder blocks | — |
| PLLs | Up to 12 enhanced PLLs per die | — |
| Configuration Method | Serial or parallel with optional decompression | — |
| Niveau MSL | 3 (per BGA moisture-sensitivity norms) | [DATA_NEEDED: MSL rating] |
| Statut RoHS | Compliant (lead-free) | Compliant (per 'N' suffix) |
| Logic Elements (LEs) | — | 57,120 |
| Logic Cells | — | 6,570 blocks (per chipdig datasheet summary) |
| Embedded RAM (Total Bits) | — | 5,215,104 bits |
| Embedded Multipliers | — | 773 (18x18) |
| Maximum User I/O Pins | — | Per datasheet, package-dependent (F1020 variant) |
| Package Type | — | 1020-ball FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch |
| Logic Family / Process | — | CMOS, 0.13 µm |
| Tension d'alimentation | — | Per datasheet (Stratix Device Handbook Vol. 1) |
| Lead-Free / Pb-Free | — | Yes (suffix 'N') |
| Configuration | — | JTAG / Passive Serial / Fast Passive Parallel via MSEL pins |
| PLL Count | — | 12 (per Stratix family datasheet) |
| Memory Block Types | — | TriMatrix (M512, M4K, M-RAM) |