EP1S80F1020C7NGA vs EP1S80F1020C6 Comparaison
Comparaison détaillée côte à côte de EP1S80F1020C7NGA par Altera et EP1S80F1020C6 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP1S80F1020C7NGA - Stratix 79,040 LE FPGA, 773 I/O, 1020-BGA | Altera
EP1S80F1020C7NGA ObsoleteComparaison des spécifications
| Paramètre | EP1S80F1020C7NGA | EP1S80F1020C6 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $198,00 | $1 180,00 |
| Family | Stratix | — |
| Logic Elements (LEs) | 79,040 | — |
| Total RAM Bits | 7,427,520 | 7,427,520 |
| User I/O Count | 773 | — |
| Boîtier | 1020-BGA (FineLine BGA) | — |
| Process Node | 130 nm | — |
| DSP Blocks | 22 | — |
| Transceivers | 8 channels, up to 3.125 Gbps | — |
| PLLs | 6 | — |
| Supply Voltage (Core) | [DATA_NEEDED: VCCINT] | — |
| Température de fonctionnement | 0C to +85C (commercial) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | Compliant (Pb-free NGA finish) | [DATA_NEEDED: rohs status] |
| Lead-Free Finish | Yes (NGA = Pb-free) | — |
| Configuration Method | JTAG / Passive Serial / Fast Passive Parallel | — |
| Series | — | Stratix |
| Logic Elements | — | 79,040 |
| Number of Logic Blocks / LABs | — | 9,191 |
| Number of I/O Pins (max) | — | 773 user I/O |
| Number of Pins / Balls | — | 1020 |
| Package Type | — | FC-FBGA (flip-chip fine-pitch BGA), 33 x 33 mm, 1.0 mm pitch |
| Process Technology | — | 130 nm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.5 V nominal (1.425 V to 1.575 V) |
| Speed Grade | — | C6 |
| Operating Temperature (Commercial) | — | 0 C to +85 C |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| Family Description | — | FPGA - Field Programmable Gate Array |
| Embedded Memory | — | TriMatrix (three block sizes, true/simple dual-port) |
| Configuration Interface | — | JTAG (IEEE 1149.1) + serial/parallel configuration device |
| Design Tool | — | Quartus II (legacy, Stratix family) |
| Niveau de sensibilité à l'humidité (MSL) | — | [DATA_NEEDED: MSL rating] |