EP1SGX40FF1020C5 vs EP1SGX40DF1020C5ES Comparaison
Comparaison détaillée côte à côte de EP1SGX40FF1020C5 par Intel et EP1SGX40DF1020C5ES par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1SGX40FF1020C5 | EP1SGX40DF1020C5ES |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 245,00 | $0,00 |
| Family | Stratix GX | — |
| Logic Elements | 41,250 | — |
| Configurable Logic Blocks (CLBs) | 4,125 | — |
| Total RAM Bits | 3,423,744 bits | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Transceiver Channels | 20 (up to 3.125 Gbps) | — |
| Core Voltage | 1.5 V (1.425 V to 1.575 V) | — |
| Température de fonctionnement | 0C to +85C (commercial, -C5 speed grade) | 0 C to 85 C |
| Boîtier | 1020-ball FCBGA (FF), 1.00 mm pitch, 33 x 33 mm | — |
| Seated Height | 3.50 mm | — |
| Process Technology | CMOS, 0.13 um | 130 nm |
| Maximum User I/O | [DATA_NEEDED: max user I/O count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Type de montage | Surface Mount | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Product Type | — | Field-Programmable Gate Array (FPGA) |
| Logic Family | — | Stratix GX |
| Logic Technology | — | CMOS |
| Logic Cells | — | 41,250 cells |
| Logic Array Blocks | — | 4,125 LABs |
| Configurable I/O Connections | — | 624 input and 624 output connections |
| Tension d'alimentation | — | 1.5 V |
| Reported Maximum Frequency | — | 5,000 MHz |
| Reported Maximum CLB Combinatorial Delay | — | 7.49 ns |
| Alternative Listed Maximum Clock Frequency | — | 6 MHz |
| Terminal Count | — | 1,020 pins |
| Package Type | — | FC-FBGA-1020 |
| Package Dimensions | — | 33 mm x 33 mm |
| Ball Pitch | — | 1 mm |
| Mounting Configuration | — | Surface-mount ball grid array |
| Terminal Form | — | Ball |
| Package Code | — | BGA |
| Configuration Method | — | [DATA_NEEDED: configuration method] |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |