EP1SGX40FF1020C7 vs EP1SGX40F1020C6 Comparaison
Comparaison détaillée côte à côte de EP1SGX40FF1020C7 par Altera et EP1SGX40F1020C6 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP1SGX40FF1020C7 - Stratix GX FPGA 41,250 LE | Intel | 1020-BGA
EP1SGX40FF1020C7 ⚠ Dernier achat
Comparaison des spécifications
| Paramètre | EP1SGX40FF1020C7 | EP1SGX40F1020C6 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $750,00 | $142,00 |
| Series | Stratix GX | EP1SGX40 |
| Family | Stratix GX (EP1SGX40) | Stratix GX |
| Logic Elements (LE) | 41,250 | — |
| Configurable Logic Blocks (CLB) | 4,125 | — |
| Embedded Memory (bits) | 3,423,744 | — |
| User I/O Pins | 624 | — |
| Number of Logic Array Blocks (LAB) | 4,125 | — |
| Number of I/O Banks | 12 | — |
| Core Supply Voltage (VCCINT) | 1.425 V to 1.575 V (nominal 1.5 V) | — |
| Speed Grade | 7 (-7, mid-speed) | C6 |
| Process Technology | CMOS | — |
| Température de fonctionnement | 0 °C to 85 °C (commercial) | 0 C to 85 C (commercial) |
| Boîtier | 1020-ball FC-FBGA (S-PBGA-B1020) | — |
| Package Dimensions | 33 mm × 33 mm | 33 x 33 mm |
| Ball Pitch | 1.00 mm | 1.00 mm |
| Type de montage | Surface Mount | — |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Configuration Modes | PS, PPS, PPA, JTAG, AS | — |
| DSP Blocks (9-bit) | 176 | — |
| Transceiver Channels | 20 full-duplex 3.1875 Gbps + 14 dedicated full-duplex 1.25 Gbps | — |
| PLLs | 8 enhanced + per-transceiver PLLs | — |
| Logic Elements | — | 41,250 |
| Configurable Logic Blocks (CLBs) | — | 4,125 |
| Total RAM Bits | — | 3,423,744 |
| Number of I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| Max Transceiver Data Rate | — | 3.1875 Gbps |
| Core Voltage (VCCINT) | — | 1.5 V |
| Logic Family | — | CMOS (SRAM-based LUT) |
| Package Type | — | 1020-ball FBGA (FineLine BGA) |
| Configuration Method | — | SRAM-based (volatile, requires boot device) |