EP1SGX40FF1020C7 vs EP1SGX40F1020C6 对比
详细并排对比 EP1SGX40FF1020C7 出自 Altera 和 EP1SGX40F1020C6 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1SGX40FF1020C7 | EP1SGX40F1020C6 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $750.00 | $142.00 |
| Series | Stratix GX | EP1SGX40 |
| Family | Stratix GX (EP1SGX40) | Stratix GX |
| Logic Elements (LE) | 41,250 | — |
| Configurable Logic Blocks (CLB) | 4,125 | — |
| Embedded Memory (bits) | 3,423,744 | — |
| User I/O Pins | 624 | — |
| Number of Logic Array Blocks (LAB) | 4,125 | — |
| Number of I/O Banks | 12 | — |
| Core Supply Voltage (VCCINT) | 1.425 V to 1.575 V (nominal 1.5 V) | — |
| Speed Grade | 7 (-7, mid-speed) | C6 |
| Process Technology | CMOS | — |
| 工作温度 | 0 °C to 85 °C (commercial) | 0 C to 85 C (commercial) |
| 封装 | 1020-ball FC-FBGA (S-PBGA-B1020) | — |
| Package Dimensions | 33 mm × 33 mm | 33 x 33 mm |
| Ball Pitch | 1.00 mm | 1.00 mm |
| 安装类型 | Surface Mount | — |
| RoHS 状态 | Compliant | [DATA_NEEDED: RoHS status] |
| Configuration Modes | PS, PPS, PPA, JTAG, AS | — |
| DSP Blocks (9-bit) | 176 | — |
| Transceiver Channels | 20 full-duplex 3.1875 Gbps + 14 dedicated full-duplex 1.25 Gbps | — |
| PLLs | 8 enhanced + per-transceiver PLLs | — |
| Logic Elements | — | 41,250 |
| Configurable Logic Blocks (CLBs) | — | 4,125 |
| Total RAM Bits | — | 3,423,744 |
| Number of I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| Max Transceiver Data Rate | — | 3.1875 Gbps |
| Core Voltage (VCCINT) | — | 1.5 V |
| Logic Family | — | CMOS (SRAM-based LUT) |
| Package Type | — | 1020-ball FBGA (FineLine BGA) |
| Configuration Method | — | SRAM-based (volatile, requires boot device) |