EP20K1000CF672C8ES vs EP20K1000CF672C8N Comparaison
Comparaison détaillée côte à côte de EP20K1000CF672C8ES par Intel et EP20K1000CF672C8N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K1000CF672C8ES - 1M-gate APEX20KE FPGA, 672-BGA | Intel
EP20K1000CF672C8ES ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP20K1000CF672C8ES | EP20K1000CF672C8N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $285,00 | $178,40 |
| Family | APEX 20K (APEX20KE) | — |
| Logic Elements | 38,400 | — |
| Typical Gates | 25,920 | — |
| Maximum System Gates | 1,000,000 | — |
| Embedded Memory (ESB) | 216 Kbits | — |
| User I/O Pins | 508 | — |
| Boîtier | 672-ball FineLine BGA | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA), 45 x 45 mm, 1.27 mm pitch |
| Speed Grade | C8 | — |
| Température de fonctionnement | Commercial (0C to +85C) | 0°C to 85°C (Commercial) |
| Process Technology | 0.18 µm CMOS | 0.15 µm all-layer copper |
| Core Voltage (VCCINT) | 2.5 V | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, LVDS, LVPECL, GTL, SSTL-2/3 | — |
| PLLs | 4 (ClockLock/ClockBoost) | — |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532) | — |
| Niveau MSL | 3 (168 hours) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Device Family | — | APEX 20KC |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements / Cells | — | 38,400 |
| Equivalent Gate Count | — | 1,000,000 gates |
| Embedded Memory (bits) | — | 327,680 |
| Number of I/Os | — | 488 to 508 |
| Number of Pins / Balls | — | 672 |
| Supply Voltage (Vccint) | — | 1.8 V |
| Internal Operating Frequency (max) | — | 301.21 MHz |
| Propagation Delay (typ.) | — | 1.6 ns to 1.79 ns |
| Architecture | — | MultiCore (LUT + embedded memory + product-term) |
| Lead-Free | — | [DATA_NEEDED: lead-free finish status] |
| Pin-to-Pin Compatibility | — | APEX 20KE family (same 672-ball BGA) |