EP20K1000CF672C8ES vs EP20K1000CF672C8N 比較
詳細な並列比較: EP20K1000CF672C8ES メーカー: Intel および EP20K1000CF672C8N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K1000CF672C8ES | EP20K1000CF672C8N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $285.00 | $178.40 |
| Family | APEX 20K (APEX20KE) | — |
| Logic Elements | 38,400 | — |
| Typical Gates | 25,920 | — |
| Maximum System Gates | 1,000,000 | — |
| Embedded Memory (ESB) | 216 Kbits | — |
| User I/O Pins | 508 | — |
| パッケージ | 672-ball FineLine BGA | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA), 45 x 45 mm, 1.27 mm pitch |
| Speed Grade | C8 | — |
| 動作温度 | Commercial (0C to +85C) | 0°C to 85°C (Commercial) |
| Process Technology | 0.18 µm CMOS | 0.15 µm all-layer copper |
| Core Voltage (VCCINT) | 2.5 V | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, LVDS, LVPECL, GTL, SSTL-2/3 | — |
| PLLs | 4 (ClockLock/ClockBoost) | — |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532) | — |
| MSLレベル | 3 (168 hours) | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| RoHS ステータス | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Device Family | — | APEX 20KC |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements / Cells | — | 38,400 |
| Equivalent Gate Count | — | 1,000,000 gates |
| Embedded Memory (bits) | — | 327,680 |
| Number of I/Os | — | 488 to 508 |
| Number of Pins / Balls | — | 672 |
| Supply Voltage (Vccint) | — | 1.8 V |
| Internal Operating Frequency (max) | — | 301.21 MHz |
| Propagation Delay (typ.) | — | 1.6 ns to 1.79 ns |
| Architecture | — | MultiCore (LUT + embedded memory + product-term) |
| Lead-Free | — | [DATA_NEEDED: lead-free finish status] |
| Pin-to-Pin Compatibility | — | APEX 20KE family (same 672-ball BGA) |