EP20K100CQ208C8 vs EP20K100EQC208-1X Comparaison
Comparaison détaillée côte à côte de EP20K100CQ208C8 par Altera et EP20K100EQC208-1X par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K100CQ208C8 | EP20K100EQC208-1X |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $13,40 | $152,00 |
| Series | APEX 20KE | — |
| Logic Elements | 4,160 | 4,160 |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 263,000 | — |
| Embedded System Block (ESB) Bits | 53,248 | — |
| Dedicated RAM Bits | 100,000 | — |
| Number of PLLs | 4 | — |
| User I/O Pins | 208 | — |
| Boîtier | 208-PQFP (28x28 mm) | 208-pin PQFP (EQC208) |
| Speed Grade | C8 | -1 (standard) |
| Température de fonctionnement | 0C to +85C (Commercial) | 0C to +85C |
| Supply Voltage Core | 1.8 V | — |
| I/O Standard Support | 1.8V / 2.5V / 3.3V / 5.0V LVTTL/LVCMOS, 3.3V PCI | — |
| Configuration Modes | Passive Serial, Passive Parallel Synchronous, Passive Parallel Asynchronous, Boundary-Scan JTAG | — |
| Type de montage | Surface Mount | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Lead-free (Pb-free), RoHS compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Family | — | APEX-20KE |
| Typical Gate Count | — | 100,000 gates |
| Embedded Memory (bits) | — | 53,248 |
| Embedded System Blocks (ESBs) | — | 26 |
| Maximum User I/O | — | 151 |
| Process Technology | — | 0.15 micrometer CMOS, all-layer copper |
| Propagation Delay | — | 1.6 ns |
| Core Supply Voltage | — | 1.8 V |
| MultiVolt I/O Support | — | 1.8V / 2.5V / 3.3V / 5.0V |
| PLLs | — | 4 |
| Configuration Interface | — | JTAG (IEEE 1149.1), passive serial/parallel |
| Niveau MSL | — | 3 (168 Hours) |