EP20K100CQ208C8 vs EP20K100EQC208-1X 对比

详细并排对比 EP20K100CQ208C8 出自 Altera 和 EP20K100EQC208-1X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K100CQ208C8 EP20K100EQC208-1X
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $13.40 $152.00
Series APEX 20KE —
Logic Elements 4,160 4,160
Typical Gates 100,000 —
Maximum System Gates 263,000 —
Embedded System Block (ESB) Bits 53,248 —
Dedicated RAM Bits 100,000 —
Number of PLLs 4 —
User I/O Pins 208 —
封装 208-PQFP (28x28 mm) 208-pin PQFP (EQC208)
Speed Grade C8 -1 (standard)
工作温度 0C to +85C (Commercial) 0C to +85C
Supply Voltage Core 1.8 V —
I/O Standard Support 1.8V / 2.5V / 3.3V / 5.0V LVTTL/LVCMOS, 3.3V PCI —
Configuration Modes Passive Serial, Passive Parallel Synchronous, Passive Parallel Asynchronous, Boundary-Scan JTAG —
安装类型 Surface Mount —
RoHS 状态 [DATA_NEEDED: RoHS status] Lead-free (Pb-free), RoHS compliant
Lead-Free [DATA_NEEDED: lead-free status] —
Family — APEX-20KE
Typical Gate Count — 100,000 gates
Embedded Memory (bits) — 53,248
Embedded System Blocks (ESBs) — 26
Maximum User I/O — 151
Process Technology — 0.15 micrometer CMOS, all-layer copper
Propagation Delay — 1.6 ns
Core Supply Voltage — 1.8 V
MultiVolt I/O Support — 1.8V / 2.5V / 3.3V / 5.0V
PLLs — 4
Configuration Interface — JTAG (IEEE 1149.1), passive serial/parallel
MSL 等级 — 3 (168 Hours)

数据手册与资源

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