EP20K100CQ240C7 vs EP20K100CQ240C8 Comparaison
Comparaison détaillée côte à côte de EP20K100CQ240C7 par Altera et EP20K100CQ240C8 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K100CQ240C7 | EP20K100CQ240C8 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $92,00 | $26,80 |
| Family | APEX-20K | APEX 20K |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 100,000 | — |
| Logic Elements | 53,248 | 4,160 |
| Embedded Memory Bits | 4,160 | — |
| Maximum User I/O Pins | 189 | — |
| Package Type | 240-BFQFP | — |
| Speed Grade | C7 | C8 (commercial, -8) |
| Température de fonctionnement | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Supply Voltage - Core | [DATA_NEEDED: core voltage] | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL (per family datasheet) | — |
| Number of PLLs | 4 (per APEX-20K family datasheet) | — |
| Embedded System Blocks (ESBs) | Yes (per APEX-20K family) | — |
| Type de montage | Surface Mount | — |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Programming Tool | Altera Quartus / MAX+PLUS II (per family) | — |
| Series | — | EP20K100 |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Embedded Memory (ESB) | — | 53,248 bits |
| User I/O Pins | — | 189 |
| Boîtier | — | 240-pin PQFP (QFP) |
| Core Voltage | — | 2.5 V |
| I/O Standards | — | LVTTL, LVCMOS, PCI |
| Configuration Interface | — | JTAG (IEEE 1149.1), serial/parallel |
| Programming Method | — | SRAM-based, in-system programmable |