EP20K100CQ240C7 vs EP20K100CQ240C8 比較
詳細な並列比較: EP20K100CQ240C7 メーカー: Altera および EP20K100CQ240C8 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K100CQ240C7 | EP20K100CQ240C8 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $92.00 | $26.80 |
| Family | APEX-20K | APEX 20K |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 100,000 | — |
| Logic Elements | 53,248 | 4,160 |
| Embedded Memory Bits | 4,160 | — |
| Maximum User I/O Pins | 189 | — |
| Package Type | 240-BFQFP | — |
| Speed Grade | C7 | C8 (commercial, -8) |
| 動作温度 | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Supply Voltage - Core | [DATA_NEEDED: core voltage] | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL (per family datasheet) | — |
| Number of PLLs | 4 (per APEX-20K family datasheet) | — |
| Embedded System Blocks (ESBs) | Yes (per APEX-20K family) | — |
| 実装タイプ | Surface Mount | — |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | — |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| Programming Tool | Altera Quartus / MAX+PLUS II (per family) | — |
| Series | — | EP20K100 |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Embedded Memory (ESB) | — | 53,248 bits |
| User I/O Pins | — | 189 |
| パッケージ | — | 240-pin PQFP (QFP) |
| Core Voltage | — | 2.5 V |
| I/O Standards | — | LVTTL, LVCMOS, PCI |
| Configuration Interface | — | JTAG (IEEE 1149.1), serial/parallel |
| Programming Method | — | SRAM-based, in-system programmable |