EP20K100EFC144-1 vs EP20K100EBC652-2X Comparaison
Comparaison détaillée côte à côte de EP20K100EFC144-1 par Intel et EP20K100EBC652-2X par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K100EFC144-1 | EP20K100EBC652-2X |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $61,75 | $85,00 |
| Device Family | APEX 20KE | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gates | 100,000 | 100,000 |
| Maximum System Gates | 263,000 | 263,000 |
| Logic Elements | 4,160 | 4,160 |
| Embedded System Blocks (ESBs) | Yes (memory + dedicated logic) | 26 |
| User I/Os | 93 | — |
| Propagation Delay | 1.6 ns | — |
| PLLs | 4 | — |
| Package Type | 144-ball FBGA (13x13 mm, 1.0 mm pitch) | — |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (multiVolt I/O) | — |
| Température de fonctionnement | 0 °C to 85 °C (commercial) | 0C to +85C (commercial) |
| Process Technology | 0.15-µm all-layer copper | 0.18 µm CMOS, SRAM-based |
| Configuration Method | SRAM (volatile) - external boot PROM required | Passive Serial / Passive Parallel / JTAG (EPC) |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Type de montage | Surface Mount | Surface Mount |
| Family | — | APEX 20KE |
| Maximum RAM Bits | — | 53,248 |
| Maximum User I/O Pins | — | 246 |
| Supply Voltage - Core | — | 1.8 V |
| Supply Voltage - I/O | — | 1.8 V / 2.5 V / 3.3 V |
| Boîtier | — | 652-ball BGA (EBC652) |
| Speed Grade | — | -2 (faster commercial) |
| Clock Resources | — | Up to 4 DLLs, multiple global clocks |