EP20K100EFC144-1 vs EP20K100FC144-2 Comparaison
Comparaison détaillée côte à côte de EP20K100EFC144-1 par Intel et EP20K100FC144-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K100EFC144-1 | EP20K100FC144-2 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $61,75 | $23,90 |
| Device Family | APEX 20KE | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 263,000 | — |
| Logic Elements | 4,160 | 4,160 |
| Embedded System Blocks (ESBs) | Yes (memory + dedicated logic) | — |
| User I/Os | 93 | — |
| Propagation Delay | 1.6 ns | — |
| PLLs | 4 | 4 |
| Package Type | 144-ball FBGA (13x13 mm, 1.0 mm pitch) | — |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (multiVolt I/O) | — |
| Température de fonctionnement | 0 °C to 85 °C (commercial) | 0 C to 85 C (Commercial) |
| Process Technology | 0.15-µm all-layer copper | 0.18 um CMOS |
| Configuration Method | SRAM (volatile) - external boot PROM required | — |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs status] |
| Type de montage | Surface Mount | Surface Mount |
| Family | — | APEX-20K |
| Logic Array Blocks (LABs) | — | 416 |
| Embedded System Block (ESB) RAM | — | 53,248 bits |
| Maximum User I/O Pins | — | 93 |
| Boîtier | — | 144-TQFP (20x20 mm) |
| Speed Grade | — | -2 |
| Core Supply Voltage (VCCINT) | — | 2.375 V to 2.625 V |
| JTAG (IEEE 1149.1) | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |