EP20K100EFC144-1 vs EP20K30EFC144-1N Comparaison
Comparaison détaillée côte à côte de EP20K100EFC144-1 par Intel et EP20K30EFC144-1N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K100EFC144-1 | EP20K30EFC144-1N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $61,75 | $125,00 |
| Device Family | APEX 20KE | APEX-20K MultiCore (LUT + Product-Term + ESB) |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 263,000 | — |
| Logic Elements | 4,160 | 1,200 |
| Embedded System Blocks (ESBs) | Yes (memory + dedicated logic) | — |
| User I/Os | 93 | 93 (per Mouser/Kynix listing); 408 (per alternate datasheet listing - see note) |
| Propagation Delay | 1.6 ns | 1.68 ns |
| PLLs | 4 | — |
| Package Type | 144-ball FBGA (13x13 mm, 1.0 mm pitch) | 144-pin FineLine BGA (FBGA) |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (multiVolt I/O) | — |
| Température de fonctionnement | 0 °C to 85 °C (commercial) | 0 °C to 85 °C (commercial, N suffix) |
| Process Technology | 0.15-µm all-layer copper | — |
| Configuration Method | SRAM (volatile) - external boot PROM required | — |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Unknown - not stated in verified sources |
| Type de montage | Surface Mount | Surface Mount |
| Series | — | APEX-20KE |
| Gates | — | 30,000 |
| Embedded SRAM Bits | — | 24,576 |
| Internal Frequency (max) | — | 160 MHz |
| Logic Family | — | CMOS |
| Core Technology | — | 0.22 µm CMOS, SRAM-based configuration |
| Supply Voltage (Core) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Configuration Interface | — | IEEE 1149.1 JTAG + serial configuration (external EPCx required) |