EP20K100FC324-1V vs EP20K60EFC324-2N Comparaison
Comparaison détaillée côte à côte de EP20K100FC324-1V par Intel et EP20K60EFC324-2N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K100FC324-1V | EP20K60EFC324-2N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $118,40 | $52,73 |
| Series | APEX-20K® | APEX-20KE |
| Number of Logic Elements / Cells | 4160 | — |
| Total RAM Bits | 53248 | 32,768 |
| Number of Gates (typical) | 100000 | — |
| Number of I/O | 252 | 196 |
| Number of LABs/CLBs | [DATA_NEEDED: number of Logic Array Blocks] | — |
| Number of EABs | [DATA_NEEDED: number of Embedded Array Blocks] | — |
| Supply Voltage - Core (VCCINT) | 2.375 V to 2.625 V | — |
| Supply Voltage - I/O (VCCIO) | 3.0 V / 3.3 V / 5.0 V tolerant (per I/O standard) | — |
| Speed Grade | -1V (commercial) | — |
| Température de fonctionnement | 0C to +85C (commercial) | — |
| Type de montage | Surface Mount | Surface Mount |
| Boîtier / Format | 324-FBGA (FineLine BGA, 19x19 mm) | 324-BGA (FineLine BGA, 19x19 mm) |
| Supplier Device Package | 324-FBGA | 324-FBGA (19x19) |
| Number of PLLs | 4 | — |
| I/O Standards Supported | LVCMOS, LVTTL, PCI, SSTL, GTL+, HSTL | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | MultiCore (LUT + ESB memory + product-term) |
| Programming Interface | JTAG (IEEE 1149.1) / in-system | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | unknown |
| Family | — | APEX 20K |
| Number of Logic Elements/Cells | — | 2,560 |
| Total System Gates | — | 60,000 |
| Number of Logic Array Blocks (LABs/CLBs) | — | 2,560 |
| Core Voltage Supply | — | 1.71 V to 1.89 V (1.8 V typ.) |
| Internal Frequency (max) | — | 200 MHz |
| Propagation Delay | — | 1.72 ns |
| Operating Temperature Range (TJ) | — | 0 °C to 85 °C (commercial) |
| Process Technology | — | 0.22 µm CMOS |
| Configuration Method | — | Passive Serial / JTAG (IEEE 1149.1) |