EP20K200EQC240-3N vs EP20K300EQC240-3 Comparaison
Comparaison détaillée côte à côte de EP20K200EQC240-3N par Altera et EP20K300EQC240-3 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K200EQC240-3N | EP20K300EQC240-3 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $45,25 | $87,20 |
| Series | APEX-20KE | — |
| Number of Logic Elements/Cells | 8320 | — |
| Number of Gates | 200000 | — |
| Total RAM Bits | 106496 bits | — |
| Number of User I/Os | 168 | — |
| Voltage - Supply | 1.71V ~ 1.89V | — |
| Core Supply Voltage | 1.8 V nominal | — |
| Maximum Internal Frequency | 189 MHz common -3 speed listing | — |
| Speed Grade | -3 | -3 |
| Température de fonctionnement | 0 to 85 C | 0C to +85C (commercial) |
| Boîtier / Format | 240-BQFP | — |
| Supplier Device Package | 240-PQFP (32x32) | — |
| Type de montage | Surface Mount | Surface Mount |
| Technology | CMOS | — |
| Process Technology | 0.22 um | 0.22 um CMOS |
| Configuration Type | SRAM-based, external configuration required | — |
| Statut du cycle de vie | Obsolete / legacy distribution via Rochester Electronics | — |
| I/O Standards Supported | [DATA_NEEDED: I/O standards from APEX-20KE datasheet] | — |
| Configuration Bitstream Size | [DATA_NEEDED: exact configuration file size for EP20K200E] | — |
| Thermal Resistance (theta_JA) | [DATA_NEEDED: thermal resistance for 240-BQFP] | — |
| Statut RoHS | Unknown; N suffix often indicates Pb-free finish but not confirmed in verified snippets | [DATA_NEEDED: confirm for this date code] |
| Family | — | APEX-20KE |
| Typical Gates | — | 300,000 |
| Logic Elements / Cells | — | 11,520 |
| Embedded Memory (bits) | — | 147,456 |
| Maximum User I/O | — | 152 |
| Number of PLLs | — | 4 |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage Tolerance | — | 2.5V / 3.3V / 5.0V compatible |
| Boîtier | — | 240-pin PQFP / BFQFP (240-BFQFP) |
| Pin Pitch | — | 1.0 mm |
| Terminal Form | — | Gull Wing |
| Programmable Logic Type | — | Loadable PLD |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |
| Configuration Interface | — | JTAG (IEEE 1149.1), passive serial |