EP20K300EBC652-1X vs EP20K200EBC652-3N Comparaison
Comparaison détaillée côte à côte de EP20K300EBC652-1X par Altera et EP20K200EBC652-3N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K300EBC652-1X - APEX 20KE FPGA 300K Gates 11520 Cells 1.8V 652-BGA | Altera
EP20K300EBC652-1X ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP20K300EBC652-1X | EP20K200EBC652-3N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $615,80 | $220,00 |
| Series | APEX 20KE | APEX 20KE (APEX-20KE®) |
| Device Family | Apex 20KE (1.8V, LVDS) | EP20K200 |
| System Gates | 300,000 | 200,000 |
| Logic Elements (Cells) | 11,520 | — |
| Total RAM Bits | 147,456 | — |
| Maximum User I/O | 408 | — |
| Number of Gates | 300K | — |
| Operating Frequency | 400 MHz | — |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 1.71 V to 1.89 V | 1.71 V to 1.89 V (nominal 1.8 V) |
| Boîtier / Format | 652-BGA (45 mm x 45 mm) | — |
| Supplier Device Package | 652-BGA | — |
| Type de montage | Surface Mount | Surface Mount |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Logic Elements / Cells | — | 8,320 |
| Logic Array Blocks (LABs) | — | 832 |
| Macrocells | — | 832 |
| Embedded RAM | — | 106,496 bits |
| User I/Os (DigiKey listing) | — | 376 |
| User I/Os (digchip listing) | — | 277 |
| Propagation Delay | — | 2.33 ns |
| Internal Frequency (max) | — | 189 MHz |
| I/O Supply (LVDS-capable) | — | LVDS, 2.5 V referenced (per source variant) |
| Boîtier | — | 652-ball BGA |
| Operating Temperature (TJ) | — | 0 °C to 85 °C (commercial) |
| Speed Grade | — | -3 (slowest in APEX 20KE family) |
| Configuration | — | JTAG (IEEE 1149.1), Passive Serial |