EP20K400BC652-2AA vs EP20K400BI652-2 Comparaison
Comparaison détaillée côte à côte de EP20K400BC652-2AA par Intel et EP20K400BI652-2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400BC652-2AA | EP20K400BI652-2 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $108,40 |
| Product Type | Field-programmable gate array (FPGA) | — |
| Series | APEX-20K | APEX-20KC |
| Number of LABs/CLBs | 1664 | — |
| Number of Logic Elements/Cells | 16640 | — |
| Total RAM Bits | 212992 bit | 212992 |
| Number of I/O | 502 | — |
| Number of Gates | 1052000 | — |
| Tension d'alimentation | 2.375 V to 2.625 V | — |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0 °C to 85 °C (TJ) | [DATA_NEEDED: operating temperature grade] |
| Boîtier | 652-BGA | 652-BGA (45 x 45 mm) |
| Supplier Device Package | 652-BGA (45x45) [DATA_NEEDED: target-device package dimensions] | — |
| Part Status | Obsolete | — |
| Configuration Memory Technology | [DATA_NEEDED: configuration memory technology] | — |
| Maximum User I/O Frequency | [DATA_NEEDED: maximum user I/O frequency] | — |
| Core Logic Voltage | [DATA_NEEDED: core logic voltage] | — |
| Typical Supply Current | [DATA_NEEDED: typical supply current] | — |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20K |
| Logic Elements / Cells | — | 16640 |
| System Gates | — | 400000 |
| Number of Logic Array Blocks (LABs) | — | 502 |
| User I/O Count | — | 502 (max per family) |
| Number of I/O Banks | — | 8 |
| Core Voltage | — | 1.71 V to 1.89 V |
| I/O Voltage Reference | — | 2.5 V (LVDS support) |
| Maximum Frequency | — | 200 MHz |
| Process Technology | — | 0.22 µm CMOS |
| Pin-to-Pin Delay (Tpd) | — | 3.1 ns |