EP20K400CB652I7 vs EP20K400CB652C9ES Comparaison
Comparaison détaillée côte à côte de EP20K400CB652I7 par Altera et EP20K400CB652C9ES par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400CB652I7 | EP20K400CB652C9ES |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $149,50 | $195,00 |
| Family | APEX 20KC | APEX 20KC |
| Device Family | Field-Programmable Gate Array (FPGA) | — |
| Typical Gates | 400,000 | — |
| Logic Elements (LEs) | 16,640 | — |
| Maximum Operating Frequency | 375.94 MHz | 250 MHz |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltage | 1.8 V / 3.3 V | — |
| Boîtier | BGA-652 (652-ball) | — |
| Package Code (JESD-30) | S-PBGA-B652 | — |
| Terminal Form | Ball | — |
| Package Shape | Square | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O] | — |
| Embedded Memory | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM | — |
| Configuration Method | SRAM + JTAG (ISP) | — |
| Speed Grade | 7 | — |
| Temperature Grade | Industrial (-40 °C to +100 °C) | — |
| Statut RoHS | Non-compliant (JESD-609 e0, contains lead) | [DATA_NEEDED: RoHS status] |
| Manufacturer Status | Obsolete (Intel/Altera legacy FPGA) | — |
| Series | — | APEX 20KC |
| Logic Elements / Cells | — | 16640 |
| Total System Gates | — | 400000 |
| Embedded Memory (Bits) | — | 212992 |
| Number of User I/O | — | 488 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Number of Logic Array Blocks | — | 1040 |
| Core Voltage | — | 1.8 V |
| Plage de température de fonctionnement | — | 0°C to +85°C (Commercial) |
| Type de montage | — | Surface Mount |
| Boîtier / Format | — | 652-BGA |
| Niveau MSL | — | 3 (168 Hours) |
| Packaging | — | Tray |
| Programmability Type | — | In-system programmable (SRAM-based) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL |
| JTAG (IEEE 1149.1) | — | Yes |
| PLL | — | Yes (4-phase) |