EP20K400EBC652-2 vs EP20K400FC784-2 Comparaison
Comparaison détaillée côte à côte de EP20K400EBC652-2 par Intel et EP20K400FC784-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K400EBC652-2 - APEX-20KE 400K Gates FPGA, 488 I/O | Intel / Altera
EP20K400EBC652-2 Obsolete
Comparaison des spécifications
| Paramètre | EP20K400EBC652-2 | EP20K400FC784-2 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $60,00 | $175,00 |
| Series | APEX-20KE | — |
| Family | APEX 20K | APEX 20K |
| Logic Elements / Macros | 1664 macros | — |
| Total Gates | 400,000 gates | — |
| User I/Os | 488 | — |
| Total RAM Bits | 212,992 bits | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V | — |
| Propagation Delay | 2.5 ns | — |
| Température de fonctionnement | 0C to 85C | [DATA_NEEDED: exact Tj range] |
| Boîtier | 652-BGA (45x45 mm) | 784-Ball FineLine BGA (FC) |
| Ball Count | 652 | — |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Logic Family | CMOS | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Statut RoHS | [DATA_NEEDED: rohs status from datasheet] | [DATA_NEEDED: not confirmed in provided data] |
| Device Family Member | — | EP20K400C |
| Typical System Gates | — | 400,000 |
| Maximum User I/O Pins | — | 488 (784-BGA) |
| Logic Elements | — | 16,640 |
| Embedded RAM (ESB) | — | 212 Kbits |
| Maximum Block RAM | — | [DATA_NEEDED: block RAM organization per ESB] |
| Maximum Frequency (internal) | — | [DATA_NEEDED: fmax, datasheet-dependent] |
| Process Technology | — | 0.22 µm CMOS SRAM |
| Core Voltage | — | 2.5 V |
| MultiVolt I/O Voltage | — | 1.8 V / 2.5 V / 3.3 V |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, SSTL-2, SSTL-3, GTL+, CTT |
| Configuration Mode | — | Serial / Parallel SRAM-volatile (external PROM required) |
| Speed Grade | — | -2 (industrial) |
| Niveau MSL | — | 3 (per Partstack listing) |
| Peak Reflow Temperature | — | 220 °C (per Partstack listing) |
| Hot Socketing | — | Supported |
| JTAG / Boundary-Scan | — | IEEE 1149.1 compliant |