EP20K400EFC672-3N vs EP20K400FC672-3V Comparaison
Comparaison détaillée côte à côte de EP20K400EFC672-3N par Intel et EP20K400FC672-3V par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400EFC672-3N | EP20K400FC672-3V |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $171,00 | $152,00 |
| Family | APEX 20KE | APEX 20KC |
| Series | APEX 20K | APEX-20KC |
| Device Type | FPGA - Field Programmable Gate Array | FPGA (Field Programmable Gate Array) |
| System Gates | 1,052,000 | 400000 |
| Logic Elements | 16,640 | — |
| Logic Array Blocks (LABs) | 1,664 macros | — |
| Embedded RAM (EAB/ESB bits) | 212,992 bits | — |
| User I/O Pins | 488 | — |
| Boîtier | 672-BBGA (FC-FBGA) | — |
| Nombre de broches | 672 | — |
| Propagation Delay | 2.5 ns | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| I/O Supply Voltage | 2.5 V | — |
| Température de fonctionnement | 0 °C to +85 °C (commercial) | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -3 | -3 |
| Technology | CMOS, 0.18 µm (per APEX 20KE family) | — |
| PLL Count | 4 | — |
| Architecture | MultiCore (LUT + Embedded System Blocks) | — |
| Statut RoHS | [DATA_NEEDED: specific RoHS status - likely non-compliant given part age] | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 16640 |
| Total RAM Bits | — | 212992 |
| Number of I/O | — | 502 |
| Number of LABs/CLBs | — | 1664 |
| Number of Logic Elements | — | 16640 |
| Supply Voltage (Core) | — | 1.71 V to 1.89 V |
| Type de montage | — | Surface Mount |
| Boîtier / Format | — | 672-BBGA, FCBGA |
| Supplier Device Package | — | 672-FBGA (27x27) |
| Process Technology | — | 0.22 µm |
| Maximum Internal Frequency | — | 167 MHz (typical) |
| Pin-to-Pin Delay | — | 3.6 ns |
| Programmability Type | — | In-system (JTAG IEEE 1149.1) |