EP20K400FC672-3V vs EP20K400FI672-3V Comparaison
Comparaison détaillée côte à côte de EP20K400FC672-3V par Altera et EP20K400FI672-3V par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400FC672-3V | EP20K400FI672-3V |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $152,00 | $285,00 |
| Family | APEX 20KC | APEX 20K (EP20K400) |
| Series | APEX-20KC | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements / Cells | 16640 | — |
| System Gates | 400000 | — |
| Total RAM Bits | 212992 | — |
| Number of I/O | 502 | — |
| Number of LABs/CLBs | 1664 | — |
| Number of Logic Elements | 16640 | — |
| Supply Voltage (Core) | 1.71 V to 1.89 V | — |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | -40 °C to +85 °C (industrial) |
| Boîtier / Format | 672-BBGA, FCBGA | — |
| Supplier Device Package | 672-FBGA (27x27) | — |
| Process Technology | 0.22 µm | 0.18 µm CMOS, 4 metal layers |
| Maximum Internal Frequency | 167 MHz (typical) | — |
| Pin-to-Pin Delay | 3.6 ns | — |
| Speed Grade | -3 | -3 (faster) |
| Programmability Type | In-system (JTAG IEEE 1149.1) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Elements | — | 16,640 |
| Maximum Gates | — | 400,000 |
| Typical Gates | — | [DATA_NEEDED: typical gates value] |
| Embedded Memory (bits) | — | 212,992 |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 6 |
| Total User I/O + Dedicated Inputs | — | 496 + 6 (variant dependent) |
| Fréquence d'horloge maximale | — | 714.2 MHz |
| Core Voltage (VCCINT) | — | 2.5 V nominal (2.375 V to 2.625 V) |
| Boîtier | — | 672-ball FineLine BGA (BBGA), 1.0 mm pitch |
| Programmable via JTAG | — | Yes (IEEE 1149.1) |
| Supported I/O Standards | — | LVCMOS, LVTTL, SSTL, GTL+, HSTL |
| Configuration Modes | — | JTAG, passive serial, passive parallel |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |