EP20K400FI672-3N vs EP20K400EFC672-3N Comparaison
Comparaison détaillée côte à côte de EP20K400FI672-3N par Altera et EP20K400EFC672-3N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400FI672-3N | EP20K400EFC672-3N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Unknown | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $171,00 |
| Device Type | CMOS loadable programmable logic device | FPGA - Field Programmable Gate Array |
| Product Family | APEX 20K | — |
| Series | EP20K400 | APEX 20K |
| Propagation Delay | 3.6 ns | 2.5 ns |
| Fréquence d'horloge maximale | 833 MHz | — |
| User I/O Count | 502 | — |
| Nominal Supply Voltage | 2.5 V | — |
| Supply Voltage Range | 2.375 V to 2.625 V | — |
| Process Technology | CMOS | — |
| Boîtier | S-PBGA-B672 | 672-BBGA (FC-FBGA) |
| Terminal Count | 672 terminals | — |
| Terminal Pitch | 1.000 mm | — |
| Type de montage | Surface mount | — |
| Logic Capacity | [DATA_NEEDED: logic capacity] | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0 °C to +85 °C (commercial) |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| Statut RoHS | unknown | [DATA_NEEDED: specific RoHS status - likely non-compliant given part age] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20KE |
| System Gates | — | 1,052,000 |
| Logic Elements | — | 16,640 |
| Logic Array Blocks (LABs) | — | 1,664 macros |
| Embedded RAM (EAB/ESB bits) | — | 212,992 bits |
| User I/O Pins | — | 488 |
| Nombre de broches | — | 672 |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Supply Voltage | — | 2.5 V |
| Speed Grade | — | -3 |
| Technology | — | CMOS, 0.18 µm (per APEX 20KE family) |
| PLL Count | — | 4 |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |