EP20K400FI672-3N vs EP20K400EFC672-3N 比較
詳細な並列比較: EP20K400FI672-3N メーカー: Altera および EP20K400EFC672-3N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K400FI672-3N | EP20K400EFC672-3N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Unknown | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $171.00 |
| Device Type | CMOS loadable programmable logic device | FPGA - Field Programmable Gate Array |
| Product Family | APEX 20K | — |
| Series | EP20K400 | APEX 20K |
| Propagation Delay | 3.6 ns | 2.5 ns |
| 最大クロック周波数 | 833 MHz | — |
| User I/O Count | 502 | — |
| Nominal Supply Voltage | 2.5 V | — |
| Supply Voltage Range | 2.375 V to 2.625 V | — |
| Process Technology | CMOS | — |
| パッケージ | S-PBGA-B672 | 672-BBGA (FC-FBGA) |
| Terminal Count | 672 terminals | — |
| Terminal Pitch | 1.000 mm | — |
| 実装タイプ | Surface mount | — |
| Logic Capacity | [DATA_NEEDED: logic capacity] | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | 0 °C to +85 °C (commercial) |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| RoHS ステータス | unknown | [DATA_NEEDED: specific RoHS status - likely non-compliant given part age] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20KE |
| System Gates | — | 1,052,000 |
| Logic Elements | — | 16,640 |
| Logic Array Blocks (LABs) | — | 1,664 macros |
| Embedded RAM (EAB/ESB bits) | — | 212,992 bits |
| User I/O Pins | — | 488 |
| ピン数 | — | 672 |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Supply Voltage | — | 2.5 V |
| Speed Grade | — | -3 |
| Technology | — | CMOS, 0.18 µm (per APEX 20KE family) |
| PLL Count | — | 4 |
| Architecture | — | MultiCore (LUT + Embedded System Blocks) |