EP20K400GC652-1XV vs EP20K400GC655-1 Comparaison
Comparaison détaillée côte à côte de EP20K400GC652-1XV par Altera et EP20K400GC655-1 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 ObsoleteComparaison des spécifications
| Paramètre | EP20K400GC652-1XV | EP20K400GC655-1 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $190,00 | $135,00 |
| Family | APEX 20K | APEX 20K |
| Logic Elements (Macros) | 1664 | — |
| Typical System Gates | 400,000 | — |
| Maximum User I/O | 502 | 502 |
| Embedded SRAM | 212,992 bits | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Logic Family | CMOS | — |
| Package Type | BGA-652 (thermally enhanced) | — |
| Température de fonctionnement | 0 C to +85 C | 0 °C to +85 °C (commercial) |
| Speed Grade | -1 (standard) | — |
| Type de montage | Surface Mount | Through-Hole |
| Statut RoHS | Compliant (lead-free, V suffix) | Non-compliant (contains lead in ceramic package) |
| Architecture | MultiCore (LUT + EAB + FastTrack interconnect) | — |
| Programming Interface | JTAG (IEEE 1149.1) / passive serial | — |
| Series | — | EP20K400 |
| Logic Elements | — | 16,640 |
| Maximum Gates | — | 1,052,000 |
| Typical Gates | — | 400,000 |
| Embedded System Blocks (ESBs) | — | 4 |
| Total RAM Bits | — | 212,992 |
| Dedicated Inputs | — | 6 |
| Process Technology | — | 0.22 µm CMOS |
| I/O Supply Voltage | — | 3.3 V |
| Maximum Internal Frequency | — | 250 MHz |
| Boîtier | — | 655-pin CPGA (Ceramic Pin Grid Array) |
| Nombre de broches | — | 655 |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, Passive Parallel Sync |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |