EP20K400GI655-3V vs EP20K400GC655-2V Comparaison
Comparaison détaillée côte à côte de EP20K400GI655-3V par Intel et EP20K400GC655-2V par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K400GI655-3V - APEX 20K 400K-Gate FPGA, 16K LE, 655-Pin PGA | Altera (Intel)
EP20K400GI655-3V ObsoleteAltera
EP20K400GC655-2V - 400K Gate APEX-20KC FPGA 655-CPGA | Altera
EP20K400GC655-2V ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP20K400GI655-3V | EP20K400GC655-2V |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $142,50 | $92,75 |
| Series | APEX 20K | APEX-20KC |
| Device Family | EP20K400 | — |
| Logic Elements | 16,640 | 16,640 |
| Typical Gate Count | 400,000 gates | — |
| Maximum User I/O | 496 | — |
| Dedicated Inputs | 6 | — |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Total Embedded RAM | [DATA_NEEDED: total RAM bits] | — |
| Technology | CMOS (0.18 µm process) | — |
| Maximum Internal Clock Frequency | 714.2 MHz | — |
| Supply Voltage VCCINT | 2.5 V | — |
| I/O Supply Voltage VCCIO | 2.5 V or 3.3 V | — |
| Boîtier | 655-pin SPGA (Staggered PGA), 47 x 47 mm | 655-CPGA (62.48 x 62.48 mm) |
| Type de montage | Through-Hole (Pin Grid Array) | Through-hole (CPGA) |
| Température de fonctionnement | -40 °C to +85 °C (industrial) | [DATA_NEEDED: temperature grade] |
| Niveau de sensibilité à l'humidité (MSL) | 1 | — |
| Qualification | Not Qualified | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Configuration Interface | IEEE 1149.1 JTAG + serial / parallel passive | — |
| Family | — | APEX 20KC (1.8 V, LVDS) |
| Total RAM Bits | — | 212,992 |
| System Gates | — | ~400,000 (typical marketing figure) |
| Number of I/O | — | [DATA_NEEDED: I/O count] |
| Core Voltage (VCCINT) | — | 2.375 V to 2.625 V (nominal 2.5 V) |
| Propagation Delay | — | 3.000 ns |
| Process Technology | — | CMOS, 0.18 um |
| LVDS Support | — | Yes |
| Package Type | — | Ceramic Pin Grid Array, through-hole |
| Speed Grade | — | -2 |
| Lead-Free | — | unknown |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |