EP20K400GI655-3V vs EP20K400GI655-3 Comparaison
Comparaison détaillée côte à côte de EP20K400GI655-3V par Intel et EP20K400GI655-3 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K400GI655-3V - APEX 20K 400K-Gate FPGA, 16K LE, 655-Pin PGA | Altera (Intel)
EP20K400GI655-3V ObsoleteComparaison des spécifications
| Paramètre | EP20K400GI655-3V | EP20K400GI655-3 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $142,50 | $55,00 |
| Series | APEX 20K | — |
| Device Family | EP20K400 | — |
| Logic Elements | 16,640 | — |
| Typical Gate Count | 400,000 gates | — |
| Maximum User I/O | 496 | 502 |
| Dedicated Inputs | 6 | 4 |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Total Embedded RAM | [DATA_NEEDED: total RAM bits] | — |
| Technology | CMOS (0.18 µm process) | — |
| Maximum Internal Clock Frequency | 714.2 MHz | — |
| Supply Voltage VCCINT | 2.5 V | — |
| I/O Supply Voltage VCCIO | 2.5 V or 3.3 V | — |
| Boîtier | 655-pin SPGA (Staggered PGA), 47 x 47 mm | 655-Pin PGA (Plastic/CPGA, square) |
| Type de montage | Through-Hole (Pin Grid Array) | Through-Hole (Socket) |
| Température de fonctionnement | -40 °C to +85 °C (industrial) | 0°C to 70°C (Industrial I grade) |
| Niveau de sensibilité à l'humidité (MSL) | 1 | — |
| Qualification | Not Qualified | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Configuration Interface | IEEE 1149.1 JTAG + serial / parallel passive | — |
| Family | — | APEX 20KE |
| Logic Elements / Cells | — | 16,640 |
| System Gates | — | 400,000 (maximum) |
| Number of Terminals | — | 655 |
| JESD-30 Code | — | S-CPGA-P655 |
| Package Shape | — | Square |
| Form of Terminal | — | PIN/PEG (through-hole) |
| Process Technology | — | CMOS, 2.5V core |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 2.5 V or 3.3 V (MultiVolt I/O) |
| Speed Grade | — | -3 (slowest of the EP20K400 family) |
| Configuration Modes | — | Passive Serial, Passive Parallel Asynchronous, JTAG |
| Embedded Memory | — | Dual-port RAM via Embedded System Blocks (ESBs) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |