EP20K400PI655-2X vs EP20K400GC655-2X Comparaison
Comparaison détaillée côte à côte de EP20K400PI655-2X par Intel et EP20K400GC655-2X par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K400PI655-2X - APEX 20K 400K Gates FPGA, 655-Pin PQFP | Intel / Altera
EP20K400PI655-2X ObsoleteComparaison des spécifications
| Paramètre | EP20K400PI655-2X | EP20K400GC655-2X |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $105,00 | $175,00 |
| Family | APEX 20K | APEX 20K |
| Device Series | EP20K400 | — |
| Speed Grade | -2X | — |
| Maximum Logic Elements | 16,640 | — |
| Maximum System Gates | 400,000 | — |
| Maximum RAM Bits | 166,400 | — |
| Embedded System Blocks (ESBs) | 104 | — |
| Maximum User I/O Pins | 488 | — |
| Maximum PLLs | 4 | — |
| Boîtier | PQFP-655 (Power Quad Flat Pack) | — |
| Température de fonctionnement | -40C to +85C (Industrial) | [DATA_NEEDED: temperature grade] |
| Core Voltage | 3.3 V | — |
| I/O Standards | LVTTL, LVCMOS, PCI, GTL+ | — |
| Type de montage | Surface Mount | Through-hole (CPGA) |
| Configuration Method | Serial / Parallel / JTAG | — |
| Process Technology | 0.18 um CMOS | 0.22 µm CMOS |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free status] | — |
| Statut du cycle de vie | Obsolete (legacy Altera APEX 20K family) | — |
| Series | — | APEX-20KC® |
| Logic Elements / Cells | — | 16640 |
| System Gates | — | 400000 |
| Total RAM Bits | — | 212992 |
| Number of I/O | — | 496 |
| Number of Dedicated Inputs | — | 6 |
| Number of LABs/CLBs | — | [DATA_NEEDED: number of Logic Array Blocks] |
| Number of EABs | — | [DATA_NEEDED: number of Embedded Array Blocks] |
| Maximum Operating Frequency | — | 200 MHz |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5 V |
| Package Type | — | 655-BCPGA (SPGA655) |
| Package Body Material | — | CERAMIC, metal-sealed cofired grid array |
| Package Dimensions | — | 47 x 47 mm |
| Peak Reflow Temperature | — | 220 °C |
| Programmability | — | In-system, JTAG (IEEE 1149.1) |
| Statut RoHS | — | unknown |