EP20K600CB672C8 vs EP20K600CEF672C7 Comparaison
Comparaison détaillée côte à côte de EP20K600CB672C8 par Intel et EP20K600CEF672C7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K600CB672C8 - APEX 20KC FPGA 600K Gates 672-FBGA | Intel / Altera
EP20K600CB672C8 Obsolete
Comparaison des spécifications
| Paramètre | EP20K600CB672C8 | EP20K600CEF672C7 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $245,00 | $98,40 |
| Series | APEX 20KC | APEX 20KC |
| Family | APEX-20KC® | APEX 20KC (Enhanced Configuration) |
| Number of Logic Elements/Cells | 24320 | — |
| Total RAM Bits | 311296 | — |
| Number of I/O | 508 | — |
| Number of Gates | 600000 | — |
| Voltage - Supply | 1.71 V to 1.89 V (core); 3.0 V to 3.6 V (I/O) | — |
| Type de montage | Surface Mount | — |
| Température de fonctionnement | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (commercial) |
| Boîtier / Format | 672-BBGA, FCBGA (27 x 27 mm) | — |
| Supplier Device Package | 672-FBGA (27 x 27) | — |
| Speed Grade | C8 (approx. 301 MHz internal) | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS, all-layer copper |
| PLLs | 4 | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, GTL+, PCI 3.3 V | — |
| Statut RoHS | Unknown (legacy part, pre-RoHS era) | [DATA_NEEDED: RoHS status] |
| Lead Free | Unknown | — |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | FPGA / Loadable PLD |
| Logic Elements / Cells | — | 24,320 |
| Gate Count (typical) | — | 600,000 gates |
| Maximum Operating Frequency | — | 375.94 MHz |
| Propagation Delay | — | 1.48 ns (typ) |
| User I/Os | — | 488 |
| Core Supply Voltage | — | 1.8 V |
| Boîtier | — | 672-ball FineLine BGA (FC-FBGA) |
| Package Code | — | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Configuration | — | SRAM-based, serial or parallel (EPC) |
| Embedded Memory | — | EAB blocks (dual-port RAM with byte enables) |
| LVDS Support | — | True-LVDS channels integrated |
| MultiVolt I/O | — | 1.8 V, 2.5 V, 3.3 V interfaces |
| External Memory Interface | — | DDR SDRAM, QDR SRAM |
| JTAG Support | — | IEEE 1149.1 boundary-scan |