EP20K600CF672C-9 vs EP20K600CF672C-8 Comparaison
Comparaison détaillée côte à côte de EP20K600CF672C-9 par Altera et EP20K600CF672C-8 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K600CF672C-9 - 600K Gates APEX 20KC FPGA 488 I/O BGA-672 | Altera
EP20K600CF672C-9 ObsoleteAltera
EP20K600CF672C-8 - APEX 20KC FPGA 600K Gates 24320 LEs 672-BGA | Intel / Altera
EP20K600CF672C-8 ObsoleteComparaison des spécifications
| Paramètre | EP20K600CF672C-9 | EP20K600CF672C-8 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $171,00 | $1 150,00 |
| Device Type | FPGA (APEX 20KC family, complex PLD) | FPGA (Field Programmable Gate Array) |
| Typical Gate Count | 600,000 gates | — |
| Logic Elements (LEs) | [DATA_NEEDED: logic element count] | 24,320 |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count and total RAM bits] | — |
| User I/Os | 488 pins | — |
| PLLs | 4 | — |
| Boîtier | 672-ball FBGA (45 x 45 mm, 1.27 mm pitch) | — |
| Nombre de broches | 672 | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) | — |
| Propagation Delay | 1.48 ns | — |
| Température de fonctionnement | 0 °C to +85 °C (commercial) | — |
| Speed Grade | -9 | -8 |
| Process Technology | 0.15 µm all-layer copper interconnect | 0.15 micrometer all-layer copper-metal |
| Configuration Interface | Serial (EPC16 / EPC8 / EPC4 / EPC2 / EPC1) | — |
| Type de montage | Surface Mount (BGA) | — |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Series | — | APEX 20KC |
| Typical Gates | — | 600,000 |
| Embedded Memory Bits | — | 311,296 |
| Maximum User I/Os | — | 508 |
| Nombre de broches | — | 672 |
| Package Type | — | 672-BGA (FineLine BGA, 1.27 mm pitch, 45 x 45 mm) |
| Propagation Delay (tPD) | — | 1.48 ns |
| Architecture | — | MultiCore (LUT logic + embedded memory) |
| Plage de température de fonctionnement | — | 0C to +85C (commercial) |
| Tension d'alimentation | — | Multi-rail (core + I/O banks) |
| Configuration Method | — | Serial / parallel / JTAG |
| Pin Compatibility | — | Pin-compatible with APEX 20KE family |