EP20K600CF672C-9 vs EP20K600CF672C-8 对比

详细并排对比 EP20K600CF672C-9 出自 Altera 和 EP20K600CF672C-8 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672C-9 EP20K600CF672C-8
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $171.00 $1,150.00
Device Type FPGA (APEX 20KC family, complex PLD) FPGA (Field Programmable Gate Array)
Typical Gate Count 600,000 gates —
Logic Elements (LEs) [DATA_NEEDED: logic element count] 24,320
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count and total RAM bits] —
User I/Os 488 pins —
PLLs 4 —
封装 672-ball FBGA (45 x 45 mm, 1.27 mm pitch) —
引脚数量 672 —
Core Supply Voltage (VCCINT) 1.8 V —
I/O Supply Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) —
Propagation Delay 1.48 ns —
工作温度 0 °C to +85 °C (commercial) —
Speed Grade -9 -8
Process Technology 0.15 µm all-layer copper interconnect 0.15 micrometer all-layer copper-metal
Configuration Interface Serial (EPC16 / EPC8 / EPC4 / EPC2 / EPC1) —
安装类型 Surface Mount (BGA) —
RoHS 状态 unknown [DATA_NEEDED: RoHS status]
Series — APEX 20KC
Typical Gates — 600,000
Embedded Memory Bits — 311,296
Maximum User I/Os — 508
引脚数 — 672
Package Type — 672-BGA (FineLine BGA, 1.27 mm pitch, 45 x 45 mm)
Propagation Delay (tPD) — 1.48 ns
Architecture — MultiCore (LUT logic + embedded memory)
工作温度范围 — 0C to +85C (commercial)
电源电压 — Multi-rail (core + I/O banks)
Configuration Method — Serial / parallel / JTAG
Pin Compatibility — Pin-compatible with APEX 20KE family

数据手册与资源

浏览全部产品 创建 BOM 获取报价