EP20K600CF672C7ES vs EP20K600CF672C6 Comparaison
Comparaison détaillée côte à côte de EP20K600CF672C7ES par Altera et EP20K600CF672C6 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera
EP20K600CF672C7ES ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP20K600CF672C7ES | EP20K600CF672C6 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $360,00 | $480,00 |
| Series | APEX 20KC | — |
| Family | APEX 20K | APEX 20KC |
| Logic Elements / Cells | 24320 | — |
| System Gates | 600000 | — |
| Maximum User I/O | 504 | — |
| Maximum Input Lines | 508 | — |
| Number of Macrocells | 504 | — |
| Maximum Operating Frequency | 375.94 MHz (per FPGAkey listing) | — |
| Propagation Delay | 1.6 ns | — |
| Internal Reference Clock | 1666.6 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.18 µm CMOS, 6 metal layers |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| Package Type | FC-FBGA | — |
| Pin / Ball Count | 672 | — |
| Grade Suffix | ES (engineering sample / extended screening) | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature grade] | 0 °C to +85 °C (commercial) |
| Type de montage | Surface Mount (BGA) | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | Non-RoHS (legacy process) |
| Configuration Memory | SRAM-based (volatile) | — |
| Typical Gate Count | — | 600,000 gates |
| Logic Elements (LEs) | — | 24,320 |
| Embedded System Blocks (ESBs) | — | 160 (each 2,048 bits) |
| Maximum Embedded RAM | — | 311,296 bits (311 kbit) |
| Maximum User I/O Pins | — | 508 |
| Boîtier | — | 672-ball FineLine BGA (CF672) |
| Package Body Size | — | 27 mm × 27 mm |
| Speed Grade | — | -6 (C6) |
| Core Voltage | — | 1.8 V |
| I/O Standards Supported | — | LVCMOS, LVTTL, HSTL, SSTL, GTL+ |
| Embedded PLLs | — | 4 |
| Configuration Method | — | SRAM-based, JTAG, EPC16/EPC2 |