EP20K600CF672I8N vs EP20K600CF672C8N Comparaison
Comparaison détaillée côte à côte de EP20K600CF672I8N par Intel et EP20K600CF672C8N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K600CF672I8N | EP20K600CF672C8N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $138,00 | $108,00 |
| Device Family | APEX 20KC | — |
| Device Type | SPLD / PLD (FPGA-class) | SPLD |
| System Gates | 600K | — |
| Logic Elements / Cells | 24,320 | — |
| Maximum User I/O (digchip) | 488 | — |
| Maximum User I/O (Altera) | 508 | — |
| Total Package Pins | 672 | — |
| Package Type | FC-FBGA (Fine-pitch Chip-Scale BGA), 45 x 45 mm, 1.27 mm pitch | — |
| Internal Performance | 301.21 MHz | — |
| Propagation Delay | 1.48 ns | 1.48 ns |
| Core Supply Voltage | 1.8 V | — |
| Process Technology | 0.15-um all-layer copper-metal | — |
| Température de fonctionnement | 0C to 85C (Industrial) | 0°C to 85°C |
| Pin-Compatible With | APEX 20KE family | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | unknown |
| Product Type | — | FPGA / programmable logic device |
| Family | — | APEX 20KC |
| Nominal Gate Capacity | — | 600K gates |
| Logic Elements or Cells | — | 24,320 |
| Macros | — | 2,432 |
| User I/O Count | — | 508 |
| Package Terminals | — | 652 pins |
| Boîtier | — | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Package Description | — | 672-pin FC-FBGA |
| Tension d'alimentation | — | 1.8 V |
| Listed Frequency | — | 301.21 MHz |
| Fabrication Process | — | 0.15 µm |
| Interconnect Metal | — | All-layer copper metal |
| I/O Configuration | — | 508 user I/O |
| Type de montage | — | Surface mount |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |
| Configuration Method | — | [DATA_NEEDED: configuration memory and programming method] |
| Core Current | — | [DATA_NEEDED: core supply current] |
| I/O Bank Voltage | — | [DATA_NEEDED: supported I/O voltage range] |
| Junction Temperature | — | [DATA_NEEDED: maximum junction temperature] |
| Résistance thermique | — | [DATA_NEEDED: junction-to-ambient thermal resistance] |