EP20K600CF672I9 vs EP20K600CF672C8 Comparaison
Comparaison détaillée côte à côte de EP20K600CF672I9 par Intel et EP20K600CF672C8 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K600CF672I9 | EP20K600CF672C8 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Unknown |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $152,00 | $322,41 |
| Family | APEX 20KC | — |
| Logic Elements / Cells | 24,320 | — |
| System Gates | 600,000 | — |
| Maximum Operating Frequency | 250 MHz | — |
| Process Technology | 0.15 µm CMOS | — |
| Core Voltage | 1.8 V | — |
| Boîtier | 672-pin FC-FBGA | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Temperature Grade | Industrial (-40°C to +85°C) | — |
| Speed Grade | 9 (fastest bin) | — |
| User I/O Pins | 311 (max) | — |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Embedded Memory | [DATA_NEEDED: total RAM bits] | — |
| PLLs | Up to 4 | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, LVDS | — |
| Configuration Mode | Passive Serial / JTAG | — |
| Maximum Seated Height | 2.1 mm | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Non-compliant |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Lead-Free | [DATA_NEEDED: lead-free] | — |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Product Family | — | APEX-20K |
| User I/O Count | — | 508 |
| Logic Elements | — | 24,320 |
| Total RAM Bits | — | 311,296 bits |
| Propagation Delay | — | 1.48 ns |
| Package Pin Count | — | 672 balls |
| Supplier Device Package | — | 672-FBGA, 27 mm x 27 mm |
| Alternate Package Description | — | BGA-652, 45 mm x 45 mm, 1.27 mm pitch |
| Package Type | — | FBGA |
| Tension d'alimentation | — | 1.71 V to 1.89 V |
| Température de fonctionnement | — | 0 C to 85 C |
| Fabrication Process | — | 0.15 um |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Configuration Interface | — | [DATA_NEEDED: configuration interface] |
| Maximum Core Frequency | — | [DATA_NEEDED: maximum core frequency] |