EP20K60EFC324-3N vs EP20K60EFC324-2N Comparaison
Comparaison détaillée côte à côte de EP20K60EFC324-3N par Altera et EP20K60EFC324-2N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K60EFC324-3N | EP20K60EFC324-2N |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $35,40 | $52,73 |
| Series | APEX-20KE | APEX-20KE |
| Number of Logic Elements | 2560 Cells | — |
| Total Gates | 60K Gates (60000 typical) | — |
| Number of User I/Os | 196 | — |
| Boîtier / Format | 324-BGA / 324-FBGA (19x19) | 324-BGA (FineLine BGA, 19x19 mm) |
| Supplier Device Package | 324-FBGA (19x19) | 324-FBGA (19x19) |
| Core Supply Voltage | 1.71V ~ 1.89V (1.8V nominal) | — |
| Température de fonctionnement | 0°C ~ 85°C (TJ) | — |
| Maximum Internal Frequency | 182 MHz (-3 speed grade) | — |
| Process Technology | 0.22 um CMOS | 0.22 µm CMOS |
| Nombre de broches | 324 | — |
| Type de montage | Surface Mount | Surface Mount |
| Total RAM Bits | [DATA_NEEDED: total RAM bits per APEX 20K datasheet] | 32,768 |
| Embedded System Blocks | [DATA_NEEDED: ESB count] | — |
| I/O Standards Supported | [DATA_NEEDED: I/O standards list] | — |
| Statut RoHS | [DATA_NEEDED: explicit RoHS statement] | unknown |
| Packaging | Bulk (per distributor listing) | — |
| Ordering Suffix | -N suffix ordering variant | — |
| Family | — | APEX 20K |
| Number of Logic Elements/Cells | — | 2,560 |
| Total System Gates | — | 60,000 |
| Number of Logic Array Blocks (LABs/CLBs) | — | 2,560 |
| Number of I/O | — | 196 |
| Core Voltage Supply | — | 1.71 V to 1.89 V (1.8 V typ.) |
| Internal Frequency (max) | — | 200 MHz |
| Propagation Delay | — | 1.72 ns |
| Operating Temperature Range (TJ) | — | 0 °C to 85 °C (commercial) |
| Architecture | — | MultiCore (LUT + ESB memory + product-term) |
| Configuration Method | — | Passive Serial / JTAG (IEEE 1149.1) |