EP20K60EFC324-3N vs EP20K60EFC324-2N 对比

详细并排对比 EP20K60EFC324-3N 出自 Altera 和 EP20K60EFC324-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K60EFC324-3N EP20K60EFC324-2N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $35.40 $52.73
Series APEX-20KE APEX-20KE
Number of Logic Elements 2560 Cells —
Total Gates 60K Gates (60000 typical) —
Number of User I/Os 196 —
封装 / 外壳 324-BGA / 324-FBGA (19x19) 324-BGA (FineLine BGA, 19x19 mm)
Supplier Device Package 324-FBGA (19x19) 324-FBGA (19x19)
Core Supply Voltage 1.71V ~ 1.89V (1.8V nominal) —
工作温度 0°C ~ 85°C (TJ) —
Maximum Internal Frequency 182 MHz (-3 speed grade) —
Process Technology 0.22 um CMOS 0.22 µm CMOS
引脚数 324 —
安装类型 Surface Mount Surface Mount
Total RAM Bits [DATA_NEEDED: total RAM bits per APEX 20K datasheet] 32,768
Embedded System Blocks [DATA_NEEDED: ESB count] —
I/O Standards Supported [DATA_NEEDED: I/O standards list] —
RoHS 状态 [DATA_NEEDED: explicit RoHS statement] unknown
Packaging Bulk (per distributor listing) —
Ordering Suffix -N suffix ordering variant —
Family — APEX 20K
Number of Logic Elements/Cells — 2,560
Total System Gates — 60,000
Number of Logic Array Blocks (LABs/CLBs) — 2,560
Number of I/O — 196
Core Voltage Supply — 1.71 V to 1.89 V (1.8 V typ.)
Internal Frequency (max) — 200 MHz
Propagation Delay — 1.72 ns
Operating Temperature Range (TJ) — 0 °C to 85 °C (commercial)
Architecture — MultiCore (LUT + ESB memory + product-term)
Configuration Method — Passive Serial / JTAG (IEEE 1149.1)

数据手册与资源

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