EP2A40B724C8 vs EP2A40B652C9 Comparaison
Comparaison détaillée côte à côte de EP2A40B724C8 par Intel et EP2A40B652C9 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40B724C8 | EP2A40B652C9 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $615,00 | $92,40 |
| Family | APEX II | APEX II |
| Device Logic Elements / Cells | 38400 | — |
| Total System Gates | ~1.5 M | — |
| Total RAM Bits | 655360 | — |
| Number of I/O | 540 | — |
| Number of Logic Gates | [DATA_NEEDED: exact gate count in cells vs system gates] | — |
| Core Supply Voltage | 1.5 V (1.425 V to 1.575 V) | — |
| Maximum Internal Frequency | 376 MHz | — |
| Process Technology | 0.15 µm CMOS, all-layer copper, up to 8 metal layers | 0.18 µm CMOS |
| I/O Standards Supported | True-LVDS, LVPECL, PCML, HyperTransport (up to 1 Gbps) | LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS |
| Boîtier / Format | 724-BBGA, FCBGA (35 x 35 mm) | — |
| Supplier Device Package | 724-BGA | — |
| Température de fonctionnement | 0 °C to 85 °C (TJ) | -40C to +85C (industrial, C9 suffix) |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Shipping Media | Tray | — |
| Statut RoHS | [DATA_NEEDED: RoHS status per datasheet] | unknown |
| Niveau de sensibilité à l'humidité (MSL) | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | — |
| Maximum System Gates | — | 1.5 M (40K logic elements) |
| Logic Elements | — | 40,160 |
| Embedded System Blocks | — | Yes (dual-port RAM, ROM, CAM) |
| Maximum User I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Boîtier | — | 652-pin BGA |
| Core Voltage | — | 1.5 V |
| Supply Voltage (I/O) | — | 3.3 V (multi-standard I/O supported) |
| Configuration Method | — | SRAM-based, serial/parallel, JTAG IEEE 1149.1 |
| PLL Count | — | [DATA_NEEDED: PLL count] |
| Niveau MSL | — | 3 (168 hours floor life) |