EP2A40F1020I7N vs EP2A40F672C6N Comparaison
Comparaison détaillée côte à côte de EP2A40F1020I7N par Intel et EP2A40F672C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40F1020I7N | EP2A40F672C6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $142,00 | $165,00 |
| Family | APEX II | APEX II |
| Device Logic Elements | 38,400 cells | — |
| System Gates | 1,500,000 | — |
| Maximum Operating Frequency | 562 MHz | — |
| Process Technology | 0.15 µm | SRAM-based, 0.18 um (per family datasheet) |
| Core Voltage | 1.5 V | 1.5 V |
| Boîtier | 1020-pin FC-FBGA | 672-ball FineLine BGA |
| Température de fonctionnement | -40C to +100C (Industrial) | Commercial (0C to +85C) |
| Speed Grade | I7 | C6 (per part number suffix) |
| Type de montage | Surface Mount | Surface Mount |
| Architecture | PLA-type / Look-up Table hybrid | — |
| Number of PLLs | [DATA_NEEDED: PLL count] | — |
| Embedded Memory | [DATA_NEEDED: total embedded memory bits] | — |
| User I/O Pins | [DATA_NEEDED: user I/O pin count] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Design Software | Quartus II | — |
| Logic Elements | — | 40,000 |
| Maximum System Gates | — | 1,125,000 |
| Embedded RAM Bits | — | 442,368 |
| Embedded System Blocks (ESBs) | — | 160 |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V |
| Configuration Methods | — | Passive Serial, Passive Parallel, JTAG |
| PLL Count | — | [DATA_NEEDED: PLL count] |