EP2A40F1020I7N vs EP2A40F672C6N Comparación
Comparación detallada lado a lado de EP2A40F1020I7N por Intel y EP2A40F672C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP2A40F1020I7N | EP2A40F672C6N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $142,00 | $165,00 |
| Family | APEX II | APEX II |
| Device Logic Elements | 38,400 cells | — |
| System Gates | 1,500,000 | — |
| Maximum Operating Frequency | 562 MHz | — |
| Process Technology | 0.15 µm | SRAM-based, 0.18 um (per family datasheet) |
| Core Voltage | 1.5 V | 1.5 V |
| Encapsulado | 1020-pin FC-FBGA | 672-ball FineLine BGA |
| Temperatura de funcionamiento | -40C to +100C (Industrial) | Commercial (0C to +85C) |
| Speed Grade | I7 | C6 (per part number suffix) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Architecture | PLA-type / Look-up Table hybrid | — |
| Number of PLLs | [DATA_NEEDED: PLL count] | — |
| Embedded Memory | [DATA_NEEDED: total embedded memory bits] | — |
| User I/O Pins | [DATA_NEEDED: user I/O pin count] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Design Software | Quartus II | — |
| Logic Elements | — | 40,000 |
| Maximum System Gates | — | 1,125,000 |
| Embedded RAM Bits | — | 442,368 |
| Embedded System Blocks (ESBs) | — | 160 |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V |
| Configuration Methods | — | Passive Serial, Passive Parallel, JTAG |
| PLL Count | — | [DATA_NEEDED: PLL count] |